MVSIS Code Generation Manual

When targeted for embedded system applications, the pure MV logic network is extended to have abstract data variables. These variables can be thought of as carrying an infinite range of values, which in the actual implementation can be mapped to any arbitrary type. Three additional types of nodes are supported for functions involving data variables: expressions, multiplexers and predicates. These are classified according to their input and output variables types, as shown in Table 1. In the examples in the table, a, b, c are multi-valued control variables, and x, y are data variables. A multiplexer is defined as f f yc y0 yn 1 , where yc is a MV-variable with n values, yi, (i 0 n 1 ) are data inputs. The output f is assigned to yi if yc i. The data computation contained in predicate nodes and expression nodes are currently modeled as uninterpreted strings, but they must be arithmetic as definable by the semantics of the C language. As a result, these nodes cannot be reasoned about or simulated inside the MVSIS environment (only the control nodes can). The behavior of the entire network can be simulated only by generating C programs and then running the compiled program separately.